Philippe MILLET, PhD. : RESUME

Expert in software and hardware embedded real-time architectures. Ten years in research and development of parallel computer architectures and associated middleware for applications focused on embedded real-time signal and image processing. Experienced in managing projects and leading development teams. Experienced in working abroad (the Netherlands, Germany, Austria) with partners and clients teams. Invited by the EU commission as computing systems expert to review FP7-ICT call 7 propositions.

Strongest Skills

Strongest Success

Professional Experience

THALES(10/1997)-present

THALES - Research and Technology division(11/2006)-present

Embedded Solutions Expert / Project Manager

Lead technology evolutions at headquarter level to cope with the next ten years' products' needs. Expertise recognition from upper management. Lead research and development teams (2-8 people). Manage budget, schedule and resources for project development. Manage several project in parallel, find synergies to reduce development costs. Establish lucrative relationship with customers and partners. Patent and publish research results.

Design innovative embedded solutions to boost computation performances, improve components reliability, reduce power consumption and equipment price.
Develop requirements and specifications for image and signal processing dedicated parallel architectures
- Designed and prototyped Heterogeneous Manycore Architecture for embedded image and signal processing
- Designed and prototyped fault tolerant manycore architecture for smart cameras.
- Specified and Lead FPGA architecture design for signal processing of aircraft embedded radars
Develop requirements and specifications for dedicated embedded operating systems and middlewares
- Lead PhD candidate with sibject : "Modeling Hardware/software realtime embedded Operating System"
- Lead PhD candidate with sibject : "Design Hardware/software modular realtime embedded Operating System"
Coordinate and participate in European and French research projects
Coordinate architecture definition and development with other divisions and external companies
- Internal partners : Thales Avionic, Thales Alinea-Space,
- External partners : TTTech, SysGo, Esterel Technologies,
- Academic partners : Technical University of Vienna, Technical University Karlshrue,
Present and defend solutions to upper management
Lead FPGA (2 people) and Software (up to 6 people) development teams
Lead and supervise 2 PhD candidates and mentor 3 junior engineers
Manage budget and schedule during implementation
Support bid effort with white paper or customer visits
Develop SystemC simulators to validate solutions on several architectures, reducing prototyping costs
Publish results in scientific journals and present at seminars and conferences
Work in Deutschland, Switzerland and Austria with partner and client teams when needed.
Member of the scientific and technical comity to review projects deliverables
Program Comity member of ISORC 2011
Successfully Passed European commition financial audit.
Successfully passed ISO 9001 audit on Project Management.

THALES - Air Defense division (07/2004 - 10/2006)

Senior R&D Engineer

Lead a deep evolution of the embedded computer architecture, tools and procedures to divide by 5 the cost of products. Managed development teams. All developments were delivered on time and within budget.

Developed standard communication solutions based on Gigabit Ethernet technologies.
Replace proprietary solutions by embedded Intel PC and standard communications mediums.
Designed and developed UDP layer in FPGA architecture; managed intern
Deployed and adapted embedded OS (Linux)
Implemented the use of code generation and configuration management tools to improve development methodology. Use of UML during specification of state machines.
Lead and Managed remote team to develop FPGA architecture for signal processing
Improved department, FPGA development and debug processes

THALES - Netherlands division (posted worker) (10/2002 - 06/2004)

Senior Software Engineer

Worked onsite with client team in the Netherlands (Hengelo) during the entire development process of the signal processing unit of a radar, from specifications to integration in the system and first delivery to the end user.

Supported specification and development of signal processing applications on parallel computer
Teach embedded parallel processing development and debug technologies to client engineer team.
Developed optimised UDP software layer over RAW Ethernet to match client performance needs.

THALES - Air Defense division (10/1998 - 10/2002)

Senior Software Engineer

Designed and realized a development studio dedicated to design and develop real-time applications over heterogeneous embedded parallel computer architectures (from 1 to hundreds of processors) in a multi-project context.

Designed and developed functional simulator to reduce need of expensive targets
Developed and maintained low level design documentation
Support customer and application teams for specifications, development and debug.
Bootloader and parallel computer dedicated operating system development.
Developed monitoring tools and built in self tests

THALES - Air Defense division (10/1997-10/1998)

Intern

Started PhD thesis work.

IIM Laboratory

IIM Laboratory (09/2006-05/2008)

Senior Software Research Engineer (voluntary research)

Research activity during free time. Development of machine/human interface using normal language.

Develop virtual agent for machine/human interface with learning capabilities
Defined state machine and data mining algorithms
Develop face recognition algorithm based on OpenCV
Project on tight schedule (due to presentation) on time
Published results at the IAT'07/CHAA-07 conference

IIM Laboratory (09/1998-03/1999)

System Engineer / Student Lead

Working with thesis director.

Installed and managed SiliconGraphix 20 workstations and 3 servers
Trained students on programming methods and processes

Education

2005	PhD in Computer science, University of Paris XI (Paris-Sud Orsay)
	Subject	Placing processes on parallel processors: the evolutionary approach
	Honours	tres honorable
	Director	Pr. Jean-Claude HEUDIN
	Jury	Pr. Bertrand ZAVIDOVIQUE, Pr. Vito DI GESU, Pr. Marc SCHOENNAUER, Dr. Jean LOUCHET
	Comparison between three search space and optimisation stochastic algorithms written in C++ (a genetic algorithm, a genetic programming algorithm and a simulated annealing) to solve process mapping on parallel machine. Related articles : ICES98, ICES2000.
1997	Master+ degree in Electrical Engineering, University of Paris XI (IEF, Paris-Sud Orsay)
	Electronics, sensors and integrated circuits
	First class honours
1997	Master's degree in Physics (Magistere de Physique), University of Paris XI (Paris-Sud Orsay)
	graduate management and engineering.
	Three years education through research restricted to the elite of the university.
	With honours
1996	Master's degree in Fundamental Physics, University of Paris XI (IPN, Paris-Sud Orsay)
	With honours
	Major in Electronics

1999	Software development methodology (1 day)
1999	Specification and qualification tests (1 day)
1999	Software Design, coding and test (1 day)
1999	Peer review (1 day)
2001	Thales Welcome Convention (3 days)
2002	Training to become a trainer (1 day)
2006	Team member of First Intervention against fire (1 day)
09/2008-02/2009	Deutsch A2 Kurs (3h/week)
09/2008-02/2009	Deutsch Muendlicherausdrueck Kurs (1.5h/week)
02/2009-06/2009	Deutsch B2.1 Kurs (3h/week)
2009	Transversal Management (4 days)
2009	Rescuer first-aid worker (4 days)
09/2009-02/2010	Deutsch B2.2 Kurs (3h/week)
2010	Project Management: 1st preparation step to PMP certification of the PMI (5 days)
02/2010-06/2010	Deutsch C1.1 Kurs (3h/week)
2010	Rescuer first-aid worker (1 days)
09/2010-02/2011	Deutsch C1.2 Kurs (3h/week)

2007	Renaissance et Culture Web Site
	Design, develop and manage a website for an non profit organisation.
2002	Emulator TO9
	Design and develop an Emulator of the TO9 (former computer based on a 6809 CPU) using C++ on windows.
1996	floppy interface
	Design and develop a user interface and low level functions to be able to access files from a TO9 formated floppies on an MS-DOS PC. Interface programmed with Pascal and x86 Assembly.

201x	IJPP : International Journal of Parallel Programming
	Paper accepted with modifications... comming soon.
2011	IVLSI 2010: Book Chapter: Designing Very Large Scale Integration Systems: Emerging Trends & Challenges
2009	Participation in GENESYS book
2009	Dynamic System Reconfiguration in Heteregeneous Platforms - The Morpheus Approach, Book chapter 9: Overall MORPHEUS Toolset Flow
2008	Design, Automation & Test in Europ : DATE'08
	Design of a HW/SW Communication Infrastructure for a heterogeneous reconfigurable processor.(PDF on DATE website)
2007	Intelligent Agent Technology/Communication between Human and Artificial Agents : IAT'07/CHAA-07
	Web Mining in the EVA Intelligent Agent Architecture.
2000	International Conference on Evolvable Systems : ICES2000
	Comparison between Three Heuristic Algorithms to Repair a Large-Scale MIMD Computer.
1998	International Conference on Evolvable Systems : ICES'98
	Fault Tolerance of a Large-Scale MIMD Architecture Using a Genetic Algorithm.
1996	Physical Review Letters Journal
	New Model of the Initial Stages of Si(111)-(7 x 7) Oxidation.

Langages	Java, C, C++, SystemC, assembleurs, VHDL, LaTeX, UML, HTML, XML, AJAX.
Configuration tools	Clearcase, SubVersion, CVS, BugZilla
Office tools	MS-Office, OpenOffice, StarOffice
Databases	MySQL

French	Native language
English	Fluent - Bright Executive speech : 4/5, writing : 3.5/5
German	European Level : C1 (Goethe Institut Deutsch Zertifikat)
Russian	European Level : B1 (ESL online test)
Dutch	Basic - Limited
Spanish	Basic - Limited

SENIOR RESEARCH & DEVELOPMENT MANAGER

Strongest Skills

Strongest Success

Professional Experience

THALES(10/1997)-present

THALES - Research and Technology division(11/2006)-present

Embedded Solutions Expert / Project Manager

THALES - Air Defense division (07/2004 - 10/2006)

Senior R&D Engineer

THALES - Netherlands division (posted worker) (10/2002 - 06/2004)

Senior Software Engineer

THALES - Air Defense division (10/1998 - 10/2002)

Senior Software Engineer

THALES - Air Defense division (10/1997-10/1998)

Intern

IIM Laboratory

IIM Laboratory (09/2006-05/2008)

Senior Software Research Engineer (voluntary research)

IIM Laboratory (09/1998-03/1999)

System Engineer / Student Lead

Education

Other Education

Personnal Projects

Publications (bibtex)

Computer Skills Summary

Languages Skills

Other Skills

Related Links

Personnal Links

Groups
HiPEAC : European Network of Excellence on High Performance and Embedded Architecture and Compilation(Member)
OpenCV : Open Source Computer Vision Library Community(Member)	(Lib on SourceForge)
WWW Computer Architecture Page(Member)
European Network of Excellence in Evolutionary Computing
Web Intelligence Consortium
IEEE Computer Society
Conferences
AMWAS'08
DATE
International Conference on Evolvable Systems (ICES)'2000
International Conference on Evolvable Systems (ICES)'1998 ICES'98i
Archi Conf Ranking
Friends Links
Sami Yehia Home Page
Christophe MILLET
Maria MILLET

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